This invention relates generally to the field of semiconductor device fabrication, and more particularly to the field of chemical mechanical polishing of semiconductor wafers, and specifically to an improved polishing pad for chemical mechanical polishing of a semiconductor wafer.
The fabrication of microelectronics devices involves the deposition and removal of multiple layers of material on a semiconductor substrate to form active semiconductor devices and circuits. Device densities currently exceed 8 million transistors per square centimeter, and they are expected to increase by an order of magnitude within the next decade. Such devices utilize multiple layers of metal and dielectric materials which can selectively connect or isolate device elements within a layer and between layers. Integrated circuits using up to six levels of interconnects have been reported and even more complex circuits are expected in the future. Device geometries have gone from 0.5 micron to 0.12 micron and will soon be 0.08 micron. Multi-levels of metallization are required in such devices to achieve the desired speeds, and each inter-metal level must be planarized during the manufacturing process. The only known process with the ability to create a sufficiently planar surface is chemical mechanical polishing (CMP). CMP may be used to remove high topography and/or to remove defects, scratches or embedded particles from the surface of a semiconductor wafer as part of the manufacturing process.
The CMP process generally involves rubbing a surface of a semiconductor wafer against a polishing pad under controlled pressure, temperature and rotational speed in the presence of a chemical slurry. An abrasive material is introduced between the wafer and the polishing pad, either as particles affixed to the polishing pad itself or in fluid suspension in the chemical slurry. The abrasive particles may be, for example, alumina or silica. The chemical slurry may contain selected chemicals which function together with the abrasive to remove a portion of the surface of the wafer in a polishing action. The slurry also provides a temperature control function and serves to flush the polishing debris away from the wafer.
As may be seen in FIG. 1, a chemical mechanical polishing system 10 may include a carrier 12 for holding and moving a semiconductor wafer 14 against a polishing pad 16 supported on a rotatable platen 18. A slurry 20 is used to provide the desired chemical interaction and abrasion when the wafer 14 is pressed and rotated against the polishing pad. As is known in the art, the rate of material removal from the wafer 14 will depend upon many variables, including the amount of force F exerted between the wafer 14 and the polishing pad 16, the speeds of rotation R1 of the carrier and R2 of the platen, the transverse location of the carrier 12 relative to the axis of rotation of the platen 18, the chemical composition of the slurry 20, the temperature, and the composition and history of use of the polishing pad 16. Numerous configurations of CMP machines are known and are available in the industry. One manufacturer of such CMP machines is Applied Materials, Inc. of Santa Clara, Calif. (www.appliedmaterials.com)
It is known in the art that polishing pads 16 may be made of various materials and compositions. One or more layers of material may be used to form a polishing pad. For example, one style of polishing pad includes both a rigid pad layer in contact with the wafer and a compliant pad layer underlying the rigid pad layer. In one example, a cast polyurethane pad is backed by a polyester felt pad stiffened with polyurethane resin. Other pads having various material compositions are known and are available in the industry. One manufacturer of prior art polishing pads is Rodel, Inc. of Phoenix, Ariz. (www.rodel.com) Polishing pads are known to have a porous surface that interacts with the wafer surface in the presence of the slurry to provide the necessary material removal for the polishing process. The porous surface will capture the micro particles of wafer materials that are removed during the CMP process. It is well known that as a polishing pad is used, the porous surface of the pad will gradually become clogged with particles and the rate of removal of wafer material will decrease with use. Yet another style of polishing utilizes a fixed abrasive pad wherein, as the name suggests, abrasive material is fixed on the surface of a polishing pad. A fixed abrasive pad will accumulate debris between the abrasive particles as it is used, and the hard mineral particles used as the abrasive will wear and may become dislodged from the pad surface. Such changes reduce the rate of material removal and cause the polishing performance to be non-reproducible from wafer to wafer. Once the material removal rate has dropped to a predetermined value, a fixed abrasive pad must be replaced and a porous surface pad must be conditioned to restore its full functionality. Pad conditioning is a integral part of prior art CMP processes. Pad conditioning may be performed by exposing the polishing pad to a sonically agitated stream of fluid with or without chemical additive, or it may be performed by rubbing a hard abrasive surface against the polishing pad to remove embedded debris and to restore a desired degree of roughness and porosity to the polishing pad surface. Pad conditioners may be metal plates having industrial diamonds affixed to their surface. Rodel, Inc. is one supplier of pad conditioners to the semiconductor manufacturing industry. In a typical CMP operation, a polishing pad may have to be conditioned after polishing only one or a few wafers. Conditioning requires that the carrier 12 be moved to a conditioning position or station, and it may consume from 5-60 seconds of critical path time during the fabrication process. During the conditioning operation, the polishing pad and its associated carrier are not available for CMP operations, thus impacting the overall productivity of a semiconductor manufacturing line. Under even the best circumstances, it is unusual to be able to perform more than ten polishing operations between conditioning operations. Pads must be replaced after polishing from 350-1,000 wafers, depending upon the polishing parameters. Accordingly, a more efficient CMP process is needed wherein the critical path time spent conditioning a polishing pad is reduced.
An improved polishing pad for a chemical mechanical polishing process is described herein as including a plurality of particles of abrasive material disposed in a matrix material. This is referred to as an embedded abrasive pad, wherein the matrix material may be a polymeric material such as polyurethane and the abrasive material may be an inorganic material such as silica, calcium carbonate, alumina silicate, feldspar, calcium sulfate, glass or sintered carbon. The matrix can be visualized as a three-dimensional grid in which the distribution of particles of abrasive material per unit volume of matrix material may be constant throughout the pad, or it may vary from a first portion of the pad to a second portion of the pad. In one embodiment, an edge portion of a polishing pad may contain fewer or more abrasive particles, thereby serving to better control the polishing performance across the pad diameter. As the polishing surface of this improved pad wears during wafer polishing operations, a new surface containing a fresh population of abrasive particles will be exposed, thereby maintaining polishing performance consistent from wafer to wafer. In this manner, as many as 100-500 polishing operations may be accomplished without the need for conditioning of the pad.